FE SIGNAL SPLITTER BOARD
This PCB has been designed to divide passively up to 16 LVDS signals to obtain a 50%-50% signal in two different connectors.
The input connector and the output connectors are all Yamaichi NFP-34A-0112BF 34 pins connectors, only 32 pins carry signals, that is, the 16 LVDS pairs.
The LVDS signals are not terminated, and there is just a resistor array that divides the signal into two.
This board has been designed in Altium.
- FE Signal Splitter schematics
- FE Signal Splitter Altium project
- FE Signal Splitter gerber files
- FE Signal Splitter List of material (missing)